Hardware Co-Design

Overview

Realizing the gains of next-generation wireless requires co-designing signal processing algorithms together with the hardware that runs them. This project explores algorithm-hardware co-design to meet the power, latency, and throughput constraints of practical systems.

Sponsors

Supported by the National Science Foundation (NSF), CISE Core program, 2024.

Documents

• Project proposal: see material/NSF_CISE_Core_2024_Co_Design.pdf (add a hosted link or move into assets/ to publish).

Related

• See also our WaveFlow project on agentic algorithm-hardware co-design.

People

Add the students and collaborators on this project.