Class Projects
Overview
If you are a student enrolled in the NYU class, you will complete a hardware design project on a topic of your choice. Your goal is to design and implement a hardware IP block or accelerator in any domain that interests you — robotics, scientific computing, wireless communication, graphics, compression, cryptography, or anything else you find compelling. Students not enrolled in this class are welcome to look at the material in this section for ideas on projects topics and how to plan projects.
Your project must include:
- A clearly defined hardware IP block (RTL or HLS)
- A well‑specified interface and integration model with a host system
- A testbench and evaluation methodology
- Documentation that allows others to reproduce your results
The expected scope is roughly equivalent to 3-4 weeks of focused engineering work for a small team.
Note: Since the physical FPGA boards are limited at this point, it is completely acceptable if your submission is entirely in simulation. That being said, you are more than welcome to deploy your IP on real hardware. The NYU Wireless lab may have some more powerful RFSoC boards if you need hardware for wireless communications. Just let me know.
Groups
You must work in a group of 2 to 4 students.
Individual projects are not permitted unless you receive explicit approval from the instructor.
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