Testbench

Concept

HwTestbench provides a codegen-source testbench path where main(self) is lowered to a C++ int main() body. The mode is sequential by design: it supports DUT construction, file I/O, push/pop stream operations, regmap helpers, and dut.run() in order.

HlsCodegenStep switches into testbench mode when is_testbench=True (or auto-detected from _is_testbench). In this mode it emits a single <kernel>_tb.cpp file.

API

• HwTestbench base class.
• HwTestbench.main(self) sequential entry point.
• HlsCodegenStep(is_testbench=True) enables TB emission.
• tb_files_to_str(...) returns generated testbench source.

Example

From examples/stream_inband/poly.py, PolyTBHls.main() demonstrates DUT binding, stream push/pop, regmap status write, and dut.run():

dut = PolyAccelComponent()
dut.s_in.push(data_hdr)
dut.s_in.push_array(samp_in, count=data_hdr.nsamp)
dut.run()
dut.m_out.pop(resp_hdr)
dut.regmap.write_status_json(self.data_dir + "/regmap_status.json", fields=["halted", "error", "tx_id"])

Quick reference

• Keep main() straight-line and sequential.
• Use dut.run() once per invocation flow.
• Stream operations: push, push_array, pop, pop_array.
• File I/O is allowed through schema/regmap helper methods.
• Concurrent SimPy-style env.process(...) patterns are future work.